Hello everyone! Welcome to the 2025 DvCon China Conference! As the chair of this conference, l am truly honored to be here with all of you. lt's exciting to gather together and discuss the latest trends and cutting-edge technologies in the field of design verification.
In recent years, we've seen tremendous growth in China's chip development across various sectors, particularly in critical areas like CPUs, GPUs, artificial intelligence, automotive electronics, communications, and the Internet of Things (loT). lt's inspiring to witness the rapid rise of domestic companies in these fields, which not only drives technological advancement but also enhances our overall market competitiveness.
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Bin Liu
2025 Keynote Speakers
Unlocking the Power of Agentic AI in Chip Design: Revolutionizing Verification for a New Era
As the chip design landscape rapidly evolves, integrating Agentic AI offers engineers a powerful solution to tackle complex verification challenges, enhance productivity, and significantly shorten the path to verification closure. This breakthrough marks the dawn of a new era in design excellence. In this keynote, Chuck Albert, Fellow at Cadence R&D, will delve into the cutting-edge advancements in Generative AI tools and explore the transformative potential of Agentic AI in shaping the future of design verification.
Chuck Alpert
AI Factories, Multi-Die Design and the Future of Verification
Artificial Intelligence (AI) has transfixed the attention of the world and is infusing the electronics landscape from cloud-to-edge, including HPC, data center, PCs, smartphones, automotive, robots and many more devices. Architects and design teams are creatively producing AI engines that meet specific AI model and end-market application requirements. With the emergence of AI Factories at the dawn of the next industrial revolution, this new era of workload-specific AI accelerators necessitates new design, optimization...
Thomas Li
The Future of RTL Design and Verification: A Vision for Collaborative Human Experts, Generative AI, and EDA Engines
The accelerating complexity of semiconductor designs has exposed the limitations of traditional RTL design and verification methodologies. This keynote explores a transformative methodology for the future of RTL design, where the collaboration between human experts, generative AI, and EDA engines converges to overcome these limitations and reshape the design and verification landscape.
Generative AI can interpret design specifications written in natural languages...
Pei-HsinHo
ABOUT DVCON
About DVCon China
DVCon China is a technical conference in China targeting the application of standardized languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. Hosted by Accellera Systems Initiative, the format of DVCon China is similar to the successful DVCon United States conference held for over 20 years in the Silicon Valley.
In order to boost the interest, usage and development of electronic design automation (EDA) and intellectual property (IP) standards in China, this highly technical conference is organized to invite industry experts to learn and share best practices on:
1.The application of system-level design and verification languages such as SystemC, SystemVerilog or e 2.The use of SystemVerilog Assertions (SVA) or the Property Specification Language (PSL) 3.Verification methodologies based on the Universal Verification Methodology (UVM)
Special Thanks
The organizers gratefully acknowledge the generous support provided by the following
Global Sponsors
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2025 Sponsors
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2025 Exhibitors
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