Date Time Program Place
2021/5/26
A.M.
09:00 - 09:15 Opening Ceremony  Ballroom 1+2, 4F
09:15 - 10:00 Keynote - Computational Logistics for Intelligent System Design Ballroom 1+2, 4F
10:00 - 10:45 Keynote - Next Generation of EDA Ballroom 1+2, 4F
10:45 - 11:30 Poster Session Yangtze Room 1, 4F
Tea Break Foyer, 4F
11:30 - 12:15 Paper Session 1 - 可适用于大规模数通芯片性能分析工具开发 Ballroom 1, 4F
Paper Session 2 - UVM is Now IEEE1800.2-2020 Standard: A 2020 Adoption Primer Ballroom 2, 4F
Paper Session 3 - Co-simulation platform of SystemC and System-Verilog for algorithm verification Yangtze Room 2+3, 4F
2021/5/26
P.M.
12:15 - 13:15 Lunch Renaissance Brasserie, 2F
13:15 - 14:00 Short Workshop 1 - The New Power Perspective – Realistic Workloads – Real Results Ballroom 1, 4F
Short Workshop 2 - Smarter Verification Management Ballroom 2, 4F
Short Workshop 3 - Early Design and Validation of an AI Accelerator's System Level Performance Using an HLS Design Methodology Yangtze Room 2+3, 4F
14:00 - 14:05 Transition  
14:05 - 14:50 Paper Session 4 - Unified Automation Verification Management Approach Ballroom 1, 4F
Paper Session 5 - Cache Coherency Verification for Multi-Core Processors Based on the PSS Ballroom 2, 4F
Paper Session 6 - High Reliability Reset Domain Checking Solution for the Modern Soc Design Yangtze Room 2+3, 4F
14:50 - 14:55 Transition  
14:55 - 15:40 Short Workshop 4 - Applying Big Data to Next-Generation Coverage Analysis and Closure Ballroom 1, 4F
Short Workshop 5 - 5.1 Smart Verification leveraging PSS ; 5.2 When Automotive FuSa Met IC Ballroom 2, 4F
Short Workshop 6 - Fast forward Software Development using Advanced Hybrid Technologies Yangtze Room 2+3, 4F
15:40 - 16:05 Tea Break Foyer, 4F
16:05 - 16:50 Paper Session 7 - Best Practice Coding Assertion IP (AIP) to Get More Predictable Results Ballroom 1, 4F
Paper Session 8 - Advanced Techniques for Enabling Gate-level CDC Verification Closure Ballroom 2, 4F
16:05 - 17:40 Tutorial - Acceleration Startup Design & Verification Yangtze Room 2+3, 4F
16:50 - 16:55 Transition  
16:55 - 17:40 Short Workshop 7 - PCIe Gen5 Validation - The Real World Ballroom 1, 4F
Short Workshop 8 - Veloce HYCON: Software-enabled SoC verification and validation on day 1 Ballroom 2, 4F
17:40 - 18:00 Best Paper & Best Poster Award Ballroom 1, 4F

Updated Date: May 21, 2021

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