大家好!欢迎参加2025年DVCon China大会!作为本次大会的主席,我非常荣幸能够在这里与大家共同探讨设计验证领域的最新动态与前沿技术。

近年来,中国的芯片研发在多个领域蓬勃发展,尤其是在CPU、GPU、人工智能、汽车电子、通信和物联网(IoT)等关键领域。我们见证了国内企业在这些领域的快速崛起,不仅推动了技术进步,也显著提升了整体市场竞争力。

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DVCon中国2025大会主席

刘斌

2025大会主旨演讲嘉宾

Unlocking the Power of Agentic AI in Chip Design: Revolutionizing Verification for a New Era

As the chip design landscape rapidly evolves, integrating Agentic AI offers engineers a powerful solution to tackle complex verification challenges, enhance productivity, and significantly shorten the path to verification closure. This breakthrough marks the dawn of a new era in design excellence. In this keynote, Chuck Albert, Fellow at Cadence R&D, will delve into the cutting-edge advancements in Generative AI tools and explore the transformative potential of Agentic AI in shaping the future of design verification.

Fellow, Cadence

Chuck Alpert

Speaker's Bio >

AI Factories, Multi-Die Design and the Future of Verification

Artificial Intelligence (AI) has transfixed the attention of the world and is infusing the electronics landscape from cloud-to-edge, including HPC, data center, PCs, smartphones, automotive, robots and many more devices. Architects and design teams are creatively producing AI engines that meet specific AI model and end-market application requirements. With the emergence of AI Factories at the dawn of the next industrial revolution, this new era of workload-specific AI accelerators necessitates new design, optimization...

Vice President of Applications Engineering, Synopsys

Thomas Li

Speaker's Bio >

The Future of RTL Design and Verification: A Vision for Collaborative Human Experts, Generative AI, and EDA Engines

The accelerating complexity of semiconductor designs has exposed the limitations of traditional RTL design and verification methodologies. This keynote explores a transformative methodology for the future of RTL design, where the collaboration between human experts, generative AI, and EDA engines converges to overcome these limitations and reshape the design and verification landscape.
Generative AI can interpret design specifications written in natural languages...

CTO of UniVista Industrial Software Group

Pei-HsinHo

Speaker's Bio >

关于DVCON

关于DVCon中国

DVCon中国是在中国举办的集成电路相关的高技术会议,探讨集成电路和电子系统设计与验证中的标准语言、工具与方法学。由Accellera Systems Initiative主办,DVCon美国在硅谷成功举办了超过20年。

为了促进和提升中国的电子设计自动化(EDA)和IP标准化,本高技术会议将广邀请IC业界专家参与,分享与学习一下行业热点技术:
1、系统级的设计与验证语言运用如SystemC,SystemVerilog,e
2、SystemVerilog 断言(SVA)或属性描述语言(PSL)
3、基于UVM的统一验证方法学

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DVCon中国会议延期至2023年举行

鉴于近期新冠疫情在全国范围内多点发生,Accellera一直在密切关注事态的发展。 由于我们非常重视与会者、合作伙伴、赞助商和志愿者的安全和身体健康,我们做出了取消今年DVCon中国会议的艰难决定。

因会议变更带来的不便深感抱歉,敬请谅解。

DVCon China2022 会务组
2022年5月30日

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