Qiuyang Wu

VP, Shanghai UniVista Industrial Software

Qiuyang graduated from University of Oregon with master’s in applied physics and computer science. He had worked in Synopsys for more than twenty years focusing on digital IC design automation technologies in the field of physical design analysis, optimization and signoff, including static timing, power, noise and yield; he chaired and spoke in various international EDA related conferences, won several EDA product awards, held many patents in the domain of digital IC analysis and signoff while worked in the US. In 2021, he joined Shanghai UniVista Industrial Software as the chief architect and vice president of the hardware verification R&D team, developed several ground-breaking, commercially successful products, such as UVHS - the first Chinese dual-mode prototyping and emulation product, and UVHP - China’s first high density hyperscale emulation server product.

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