The Design and Verification Conference & Exhibition China (DVCon China) is the premier conference on the application of standardized languages, tools, and methodologies for the design and verification of electronic systems, embedded systems and integrated circuits in China.
The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees to adopt similar techniques to improve their own design and verification flows.
In addition to the specific topic areas suggested below, submissions may incorporate:
- Usage of Electronic Design Automation (EDA) tools such as simulation, hardware emulation, formal verification, virtual prototyping and/or FPGA prototyping
- FPGA-based designs
- Usage of specialized design and verification languages such as SystemVerilog, SystemC, and e
- Assertions in SVA or PSL
- The use of general purpose and scripting languages such as C, C++, Perl, Python, Tcl and others
- Applications of the new Accellera Portable Stimulus Standard
- Applications of design patterns or other innovative language techniques
- The use of AMS languages
- Internet of Things applications
This call for abstracts solicits for papers and corresponding presentations that are highly technical and reflect real-life experiences and emerging trends in various domains. Submissions are encouraged in (but not limited to) the following areas:
TOPIC AREA 1: VERIFICATION & VALIDATION
- Advanced methodologies, testbenches and flows
- Verification processes, regressions and resource management
- Debug and analysis of complex designs
- Hardware/Software co-design and co-verification of embedded systems
- DFX methodology
- UVM SC methodology
- Python based Verification
TOPIC AREA 2: DESIGN AND VERIFICATION REUSE & VALIDATION
- Bridging verification and validation across multiple engines (virtual prototyping, simulation, emulation and/ or FPGA prototyping)
- SoC and IP integration methods, flows and tools
- Applications of the Accellera Portable Stimulus Standard
- Configuration management of IPs including different abstraction levels
- Interoperability of models and/or tools
- High-level synthesis from ESL languages
- Flow and tool automation (e.g., IP-XACT)
- High-level functional modelling
- Automation, including testbench, flow and tool (e.g., IP-XACT)
- Bridging virtual prototyping, simulation, emulation and/or FPGA prototyping
TOPIC AREA 3: MACHINE LEARNING AND BIG DATA
- Automating the Optimization of Verification Processes
- Coverage metrics and data analysis
- Performance modeling and/or analysis
TOPIC AREA 4: SAFETY-CRITICAL DESIGN AND VERIFICATION
- Verification and DO-254 compliance
- Automotive ISO 26262 design and verification challenges
- Medical or industrial verification challenges
- Requirements-Driven verification methodologies
- IP protection and security
TOPIC AREA 5: MIXED-SIGNAL DESIGN AND VERIFICATION
- AMS concept and system design
- Mixed-signal design and verification techniques
- Real-value modeling approaches
- Application of mixed-signal extensions (e.g. UVM AMS)
TOPIC AREA 6: LOW-POWER DESIGN AND VERIFICATION
- Low-power design and verification
- Clock domain crossing verification
- Power modeling, estimation and management
To spare you the many hours of preparation associated with other paper submissions, DVCon China has the following process:
- Submit a 600-1000 words (approximately 2 pages, not including diagrams, figures or tables) abstract highlighting what you wish to present at DVCon China. The deadline for abstract submission is December 23, 2024.
- Authors of exceptionally strong abstracts will be shortlisted for oral or poster presentation at the conference.
An abstract is expected to include the following details:
- Proposed paper title.
- An introduction that specifies the context and motivation of the submission.
- A clear description of the specific contributions of your work.
- A summary that highlights results.
- Must use the suggested template format (found on DVCon China website).
- Must be 600-1000 word, approximately 2 pages.
- References, if appropriate.
- Please note: Consistent with the requirements for other DVCon presentations, your presentation may contain your company logo only on the title slide.
- IMPORTANT: DO NOT list author information on the abstract file submission. The submitter will enter this information into the submission form only. Reviews are conducted as blind reviews, and author information will be included in the final program and program website for accepted submissions only.
Provide enough details so that the Technical Program Committee can evaluate the potential quality and interest of your possible presentation at DVCon China. A one-paragraph summary will not fulfill this requirement.
- December 23, 2024: Abstract Submission Deadline
- January 24, 2025: Accept/Reject Notification
- February 21, 2025: Draft Paper Due for Review
- March 21, 2025: Final Paper and Copyright Form Due
- April 9, 2025: Draft Presentation Slides Due for Review
- April 15, 2025: Final Presentation Slides Due